Network systems design : using network processors : Intel IXP version (Record no. 10891)
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000 -LEADER | |
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fixed length control field | 02405nam a2200229 a 4500 |
020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
ISBN | 0131417924 |
020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
ISBN | 9780131417922 |
020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
ISBN | 9788178089942 |
020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
ISBN | 8178089947 |
082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER | |
Classification number | 004.6 |
Item number | COM |
100 ## - MAIN ENTRY--AUTHOR NAME | |
Personal name | Comer, Douglas E. ; |
245 ## - TITLE STATEMENT | |
Title | Network systems design : using network processors : Intel IXP version |
260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT) | |
Place of publication | Delhi : |
Name of publisher | Pearson Education, |
Year of publication | ©2003. |
300 ## - PHYSICAL DESCRIPTION | |
Number of Pages | xxiv, 515 p. : |
Other physical details | illustrations ; |
500 ## - GENERAL NOTE | |
General note | Included Index. |
505 ## - FORMATTED CONTENTS NOTE | |
Formatted contents note | Ch. 1. Introduction And Overview --<br/>Ch. 2. Basic Terminology And Example Systems --<br/>Ch. 3. Review Of Protocols And Packet Formats --<br/>pt. I. Traditional Protocol Processing Systems --<br/>Ch. 4. Conventional Computer Hardware Architecture --<br/>Ch. 5. Basic Packet Processing: Algorithms And Data Structures --<br/>Ch. 6. Packet Processing Functions --<br/>Ch. 7. Protocol Software On A Conventional Processor --<br/>Ch. 8. Hardware Architectures For Protocol Processing --<br/>Ch. 9. Classification And Forwarding --<br/>Ch. 10. Switching Fabrics --<br/>pt. II. Network Processor Technology --<br/>Ch. 11. Network Processors: Motivation And Purpose --<br/>Ch. 12. The Complexity Of Network Processor Design --<br/>Ch. 13. Network Processor Architectures --<br/>Ch. 14. Issues in Scaling A Network Processor --<br/>Ch. 15. Examples Of Commercial Network Processors --<br/>Ch. 16. Languages Used for Classification --<br/>Ch. 17. Design Tradeoffs And Consequences --<br/>pt. III. Example Network Processor --<br/>Ch. 18. Overview Of The Intel Network Processor --<br/>Ch. 19. Embedded RISC Processor (StrongARM Core) --<br/>Ch. 20. Packet Processor Hardware (Microengines And FBI) --<br/>Ch. 21. Reference System And Software Development Kit (Bridal Veil, SDK) --<br/>Ch. 22. Programming Model (ACE) --<br/>Ch. 23. ACE Run-Time Structure And StrongARM Facilities --<br/>Ch. 24. Microengine Programming I --<br/>Ch. 25. Microengine Programming II --<br/>Ch. 26. An Example ACE --<br/>Ch. 27. Intel's Second Generation Processors. |
520 ## - SUMMARY, ETC. | |
Summary, etc | For undergraduates or graduate students who have taken a computer networking course, this book shows how to build the bridges, switches, routers, firewalls, and more that are the building blocks of Internet. It covers the concepts, principles, hardware and software architectures that underlie the design and implementation of network systems. |
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
Topical Term | Data transmission systems. |
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
Topical Term | System design. |
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
Topical Term | Internet. |
942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
Koha item type | Reference Books |
Collection code | Home library | Current library | Shelving location | Date acquired | Source of acquisition | Cost, normal purchase price | Full call number | Accession Number | Koha item type |
---|---|---|---|---|---|---|---|---|---|
Reference | Main Library | Main Library | Reference | 17/03/2005 | Purchased | 975.00 | 004.6 COM | 009534 | Reference Books |